What is Automatic Routing? Definition,Types and Process
31 Jan 2026 10:46:45 GMT
Tyson From www.hycxpcba.com
dense multilayer PCB generally refers to a complex circuit board that has three or more copper layers, stacked dielectric insulation layers, and features high component mounting density and high interconnection density.
A smaller PCB footprint usually leads to higher component density, thereby enabling more functions per unit area and reducing the need for external wiring.
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High-Density Interconnect (HDI) Device Applications: Widely use packages such as BGA and QFN with fine-pitch pins (e.g., pin pitch < 0.5mm), resulting in a sharp increase in the number of nodes that need to be interconnected per unit area.
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Micro-refined traces and pitches: Thanks to advanced manufacturing processes, the line width/line spacing can reach 3-4 mils (approximately 75-100 microns) or even smaller, providing a physical foundation for wiring but also imposing stringent requirements on rule setting.
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Complex interlayer interconnection structure: extensive use of blind vias, buried vias, and microvias to achieve three-dimensional spatial connections between different signal layers, which is the key to freeing up routing space and achieving high density.
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Multilayered Power Distribution Network (PDN): Through dedicated power and ground planes, it provides stable power supply to numerous components and controls signal return paths, which is crucial for Signal Integrity (SI) and Electromagnetic Compatibility (EMC).
What is PCB Automatic Routing (Autorouting)?
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Physical Rules: Trace width, Trace spacing as per IPC standards, and the size and limitations for different types of vias (through hole, blind, and buried vias).
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Electrical Appliance Rules:
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Impedance control: Define the desired impedance for high-speed signals (such as DDR and PCIe) and enforce it through trace width, dielectric thickness, and reference planes.
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Timing constraint: Perform equal-length routing or length matching for signal groups that need synchronization, like timing domains and data buses, in order to control the signal delays.
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Topology Rules: Specify the wiring order of essential networks to address congestion issues in planning routes and layouts.
How PCB Automated Routing Works?
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Preprocessing and Constraint Setup:
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Include the optimized component layout, as inefficient component layout is a major cause of routing failure.
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Load the set of rules for electrical constraints (trace/space), parameters for differential pairs, impedance targets, and rules for the thickness and diameter of vias.
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These rules form the basis of all the following operations performed by the algorithm.
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Network Priority Sorting:
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The tool distinguishes between net types based on criticality (such as clock nets, differential pairs, high-speed signals) and based on the complexity of the routing (such as BGA escape routing).
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High-priority nets get preference in the allocation of routing resources.
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Path Exploration and Routing (Core Algorithm Phase):
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The routing engine uses a variety of algorithms to search for paths in the routing resource grid of the PCB. The main aim is to find the best path (minimizing a certain cost function, possibly taking into account length, via count, congestion, etc.) that exists between the two points without violating design rules (DRC).
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Combination of Hybrid Algorithms: Modern automatic routers use a hybrid approach rather than a pure algorithm. Thus, for example, a graph-based shortest path algorithm (such as A*) may be employed in initial connectivity routing; then a congestion-conscious algorithm may be employed in global routing; finally, push-and-shove or shape-based routing may be employed in trace geometry detail.
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Via Strategy and Optimization:
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The algorithm automatically adds vias when layer transitions are required. An experienced router takes into account signal return paths, thermal analysis, and planes in preventing overuse of vias, especially in high-speed traces.
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Iterative Optimization and Conflict Resolution:
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For those nets which do not have a routing path or do not follow auto routing rules, it starts an “unrouting and rerouting” process and then retries until convergence or reaches a limit of iterations.
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Post-processing and Validation: After the autorouting process has been completed, the Design Rule Check (DRC) and Layout Versus Schematic (LVS) checks are done.
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The crucial simulation closed-loop:
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The output of PCB automatic routing cannot be directly used for production. Reflection, crosstalk, and timing must be checked through signal integrity (SI) simulation; the impedance and noise of the power supply network must be verified through power integrity (PI) simulation. Simulation results often need to be fed back to constraint rules or layout for multiple rounds of iterative optimization.
Types of Auto Routing Algorithms Used In PCB
| Algorithm Types | Features | Use Cases |
| Maze Routing | Search the space of routing on each cells to determine if there exists a legal path between two pins in given constraints. | Initial path discovery in PCB & VLSI routing |
| Graph-Based Shortest Path | Finds minimum-cost paths based on length, vias, and congestion penalties | Subroutine inside autorouters |
| Rip-Up and Re-Route (R&R) | Removes existing routes and re-routes them with updated costs | Global routing optimization |
| Negotiated Congestion Routing | Gradually penalizes overused resources until congestion resolves | Global routing in dense designs |
| Push-and-Shove Routing | Moves existing traces to create space while preserving DRC | Interactive and automatic PCB routing |
| Shape-Based Routing | Routes using actual trace shapes instead of grid cells | Modern PCB autorouters (fine pitch, HDI) |
| Topological Routing | Determines relative routing order and topology before geometry | Early-stage routing planning |
| Hierarchical Routing | Breaks large designs into regions and routes hierarchically | Large multilayer boards |
| Genetic Algorithms | Evolving routing solutions over generations | Research prototypes |
| Monte Carlo Tree Search (MCTS) | Explores routing decisions using stochastic sampling | Emerging EDA research |
Limitations of PCB Automatic Routing
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A poor component layout will render any autorouter ineffective
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Optimal component placement may lead to unsolvable routing congestion
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Analog, RF networks, power circuits, and power converters that are sensitive to noise, require specific matching or shielding, need to rely on engineers for manual routing or guided routing to ensure signal integrity
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Algorithms typically seek “acceptable solutions” rather than mathematically global optimal solutions, which may result in an excessive number of vias or non-ideal routing, increasing effects such as ground reflection and crosstalk, and degrading electrical performance
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Overly complex or contradictory design rules may cause the algorithm to stagnate or produce unforeseen routing patterns.
Best Practices When Using Auto Routing
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Constraints First, Layout Collaboration: Develop detailed and consistent constraint rules before autorouting, and collaborate with PCB layout for optimization.
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Manual pre-routing of critical networks: Manually pre-route clocks, critical differential pairs, sensitive analog signals, etc., lock their paths and layers, and set “main roads” for automatic routing.
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Hierarchical and zoned strategy: Plan the main routing directions for each signal layer (e.g., horizontal routing for layer X and vertical routing for layer Y), and use power/ground planes for effective isolation.
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Phased and selective routing: First run high-priority networks, check the results, and then route general networks. For extremely complex modules, consider routing by region.
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Simulation-driven iterative optimization: Establish a closed-loop process of “routing – simulation – rule/layout adjustment – re-routing”, which is the only reliable path to achieving high-performance design.
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